The data in a FLASH EPROM device is conventionally erased by providing a constant voltage to the source of the device. It is very important that the electric field across the tunneling oxide generated thereby remain constant as nearly as possible during erasure so as not to put undue stress on the tunneling oxide. It is known that if a voltage potential is applied directly to the source of the FLASH EPROM, that an unacceptable amount of stress is exerted on the oxide because the very high peak field generated at the beginning of the erasure.
When a load resistance is placed between the voltage supply and the source of the FLASH EPROM the electric field generated thereby generates less stress than when no load resistor is provided. However, even when utilizing this arrangement, stress is still present because the electric field generated thereby is still not a constant value.
In addition, as the size of the device decreases, another problem, known as short channel effect also becomes significant. That is, it is known that hot carriers are generated due to a lateral electrical field in the channel between the source and the drain of the device. At the larger device sizes, i.e., when the channel between the source and drain is long, the transient electrical field generated is very small during that charging period, i.e., the period when the voltage is applied to the source. However, as the channel becomes shorter, then these hot spots can be created more easily. The prior art constant voltage supply arrangement for the FLASH EPROM cell becomes harmful in this aspect due to the high field generated at the beginning of the erasure.
A third problem associated with known FLASH EPROM devices when erased is that they are not easily able to be adjusted to various voltage supplies. Hence, if the power supply that is provided to the device is a five volt power supply, but in fact, the device itself is a three volt device, complicated circuitry is required to bring the voltage down to a level which can be properly utilized with the three volt device. Accordingly, known systems require complicated circuitry to either ramp up or lower the voltage of the device to provide a constant electric field.
In addition, it is known that the endurance of EPROM devices is affected by electron trapping in the tunneling oxide. This becomes a bigger problem as the device sizes become smaller.
Finally, it is important as power requirements are reduced on semiconductor devices to provide ways to reduce the peak field necessary for erasure.
What is needed, therefore, is a circuit that would allow for a constant field to be provided during erasure of a FLASH EPROM device while at the same time would overcome the above-identified problems associated with short channel effect and varying voltage supplies. The present invention addresses such a need.